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| 1 for more information www.linear.com/LTC3106 typical a pplica t ion fea t ures descrip t ion 300ma low voltage buck-boost converter with powerpath and 1.6a quiescent current the lt c ? 3106 is a highly integrated, ultralow voltage buck- boost dc/dc converter with automatic powerpath man- agement optimized for multisour ce, low power systems. at no load, the LTC3106 draws only 1.6 a while creating an output voltage up to 5v from either input source. if the primary power source is unavailable, the LTC3106 seamlessly switches to the backup power source. the LTC3106 is compatible with either rechargeable or pri - mary cell batteries and can trickle charge a backup battery whenever there is an energy surplus available. optional maximum power point control ensures power transfer is optimized between power source and load. the output volt - age and backup voltage, v store , are programmed digitally, reducing the required number of external components. zero power shelf mode ensures that the backup battery will remain charged if left connected to the LTC3106 for an extended time. additional features include an accurate turn-on voltage, a power good indicator for v out , a user selectable 100ma peak current limit setting for lower power applications, thermal shutdown as well as user selectable backup power and output voltages. a pplica t ions n dual input buck-boost with integrated powerpath? manager n ultralow start-up voltages: 850mv start with no backup source, 300mv with a backup source n compatible with primary or rechargeable backup batteries n digitally selectable v out and v store n maximum power point control n ultralow quiescent current: 1.6a n regulated output with v in or v store above, below or equal to the output n optional backup battery trickle charger n shelf mode disconnect function to preserve battery shelf life n burst mode ? operation n accurate run pin threshold n power good output voltage indicator n selectable peak current limit: 90ma/650ma n available in thermally enhanced 3mm 4mm 16-pin qfn and 20-pin tssop packages n wireless sensor networks n home or office building automation n energy harvesting n remote sensors l, lt , lt c , lt m , linear technology, the linear logo, eterna and burst mode are registered trademarks and powerpath is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. protected by u.s. patents, including 7432695 and 6366066. efficiency vs input voltage solar cell input with primary battery backup + + 10h v store v cap envstr run v cc pri v aux tl-5955 primary battery 3.6v 600mv to 5v pv cells v out pgood mpp ilimsel gnd LTC3106 v in 1m v cc pgood 3106 ta01a 2.2f 47f 3.3v 50ma 10f 1f 0.01f 470f sw1 sw2 ltc 3106 3106f 2 2.5 3 3.5 4 4.5 5 5.5 40 45 v in eff. 50 55 60 65 70 75 80 85 90 95 v in p.l. 100 0 10 20 30 40 50 60 70 80 v str eff. 90 100 110 efficiency (%) power loss (mw) LTC3106 ta01b i out = 50ma v str p.l. input voltage (v) 0.5 1 1.5
2 for more information www.linear.com/LTC3106 p in c on f igura t ion a bsolu t e maxi m u m r a t ings supply voltages v in , v store , v out , v cap ........................... C0.3 v to 6 v all other pins ............................................... C0.3 v to 6v operating junction temperature range ( notes 2, 3) ............................................ C40 c to 125 c (notes 1, 6) 20 19 18 17 7 8 top view 21 gnd udc package 20-lead (3mm 4mm) plastic qfn 9 10 6 5 4 3 2 1 11 12 13 14 15 16 nc v out v aux v cc os1 os2 v in gnd envstr run ilimsel pri v cap v store sw1 sw2 pgood mpp ss2 ss1 t jmax = 125c, v ja = 52c/w, v jc = 7c/w (note 5) exposed pad (pin 21) is gnd, must be soldered to pcb fe package 20-lead plastic tssop 1 2 3 4 5 6 7 8 9 10 top view 20 19 18 17 16 15 14 13 12 11 v store v cap v out nc v aux v cc os1 os2 pgood mpp sw1 sw2 v in gnd envstr run ilimsel pri ss1 ss2 21 gnd t jmax = 125c, v ja = 48.6c/w, v jc = 8.6c/w (note 5) exposed pad (pin 21) is gnd, must be soldered to pcb o r d er i n f or m a t ion lead free finish tape and reel part marking* package description temperature range LTC3106eudc#pbf LTC3106eudc#trpbf lgqh 20-lead (3mm w 4mm) plastic qfn C40c to 125c LTC3106iudc#pbf LTC3106iudc#trpbf lgqh 20-lead (3mm w 4mm) plastic qfn C40c to 125c LTC3106efe#pbf LTC3106efe#trpbf LTC3106fe 20-lead plastic tssop C40c to 125c LTC3106ife#pbf LTC3106ife#trpbf LTC3106fe 20-lead plastic tssop C40c to 125c consult lt c marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. some packages are available in 500 unit reels through designated sales channels with #trmpbf suffix. storage temperature range .................. C65 c to 150 c lead temperature ( soldering , 10 sec ) fe pac kage ....................................................... 300 c ltc 3106 3106f 3 for more information www.linear.com/LTC3106 e lec t rical c harac t eris t ics the l denotes the specifications which apply over the specified junction temperature range, otherwise specifications are at t a = 25c ( note 2). v in = 1.5v , v out = 3.3v , v store = 3.6 v and v aux in regulation unless otherwise noted. parameter conditions min typ max units v in start-up voltage start-up from v in , v out = v aux = v store = 0v, run = v in l 0.85 1.2 v v in maximum operating voltage 5.1 v v in minimum operating voltage v store in operating voltage limits, run > 0.613v, envstr pin > 0.8v (minimum voltage is load dependent) l 0.25 0.3 0.35 v v in minimum no-load start-up power start-up from v in , run = v in , v out = v aux = v store = 0v 12 w v in undervoltage quiescent current start-up from v in , run = v in , v out = v aux = v store = 0v l 1 2 a shutdown current C v in v store = 0v, run = 0 t j = C40c to 85c (note 4) l 300 300 750 450 na na quiescent current C v in switching enabled, v out in regulation, non-switching l 0.1 1 a switching enabled, v out in regulation, non-switching, t j = C40c to 85c (note 4) 0.1 0.3 a v store maximum operating voltage pri = v cc , envstr = v store l 4.3 v v store minimum operating voltage v out in regulation, v cap shorted to v store , pri = v cc , envstr = v store 2.1 v v store under voltage lockout pri = v cc , envstr = v store l 1.730 1.778 1.826 v v store operating voltage (note 7) ss1 = 0v, ss2 = 0v ov uv l l 3.90 2.70 4.00 2.78 4.10 2.86 v v ss1 = 0v, ss2 = v cc ov uv l l 2.81 1.85 2.90 1.90 2.99 1.95 v v ss1 = v cc , ss2 = 0v ov uv l l 2.91 2.08 3.00 2.15 3.08 2.21 v v ss1 = v cc , ss2 = v cc ov uv l l 3.90 2.91 4.00 3.00 4.10 3.08 v v output regulation voltage 1.8v v out selected t j = C40c to 85c (note 4) l 1.75 1.8 1.85 v 1.755 1.8 1.845 v 2.2v v out selected t j = C40c to 85c (note 4) l 2.14 2.2 2.25 v 2.145 2.2 2.245 v 3.3v v out selected t j = C40c to 85c (note 4) l 3.22 3.3 3.40 v 3.23 3.3 3.38 v 5v v out selected t j = C40c to 85c (note 4) l 4.90 5.0 5.10 v 4.92 5.0 5.08 v quiescent current C v aux enabled, v out in regulation, non-switching, t j = C40c to 85c (note 4) l 1.6 1.6 3 2.5 a a quiescent current C v out enabled, v out in regulation, non-switching, t j = C40c to 85c (note 4) l 0.1 0.1 1 0.3 a a quiescent current C v store enabled, v out in regulation, non-switching, v cap shorted to v store t j = C40c to 85c (note 4) l 0.1 0.1 1 0.3 a a shutdown current C v store v in = 0v, v cap shorted to v store , envstr = 0v t j = C40c to 85c (note 4) l 0.1 0.1 0.7 0.3 a a shelf mode v store leakage current isolated v store , envstr = 0v 0.1 25 na n-channel mosfets C leakage current b and c switches 0.1 1 a p-channel mosfets C leakage current a1, a2, d1 and d2 switches 0.1 1 a n-channel mosfet b and c switch r ds(on) v in = 5v 0.5 p-channel mosfet a1 r ds(on) v in = 5v 0.5 p-channel mosfet a2 r ds(on) v store = v cap = 4.2v 1.9 p-channel mosfet d1 r ds(on) v out = 3.3v 0.9 p-channel mosfet d2 r ds(on) v store = v cap = 4.2v 2.9 ltc 3106 3106f 4 for more information www.linear.com/LTC3106 parameter conditions min typ max units p-channel mosfet auxsw r ds(on) v aux = 5.4v 3 p-channel v store isolation mosfet r ds(on) v store = 4.2v 2 peak current limit (v out ) v out powered from v in , ilimsel > 0.8v v out powered from v in , ilimsel = 0v v out powered from v store , ilimsel > 0.8v v out powered from v store , ilimsel = 0v l l l l 530 60 140 60 725 100 200 100 ma ma ma ma valley current limit v out powered from v in , ilimsel > 0.8v v out powered from v in , ilimsel = 0v v out powered from v store , ilimsel > 0.8v v out powered from v store , ilimsel = 0v l l l l 300 10 30 10 400 44 70 44 ma ma ma ma peak current limit (v store charging) v store powered from v in l 60 100 ma pgood threshold v out falling, percentage below v out C11 C9 C7 % pgood hysteresis percentage of v out 3 % pgood voltage low i pgood = 100a 0.2 v pgood leakage current v pgood = 5v 0.1 10 na v ih digital input high logic level pins: os[1:2], ss[1:2], ilimsel, envstr, pri l 0.8 v v il digital input low logic level pins: os[1:2], ss[1:2], ilimsel, envstr, pri l 0.3 v digital input leakage current pin voltage = 5.2v, pins: os[1:2], ss[1:2], ilimsel, pri 0.1 10 na envstr input leakage current l 44 80 na auxiliary voltage threshold v aux rising 5.2 v auxiliary voltage hysteresis v aux falling, restart v aux charging 50 mv mpp pin output current v mpp = 0.6v l 1.21 1.5 1.72 a mpp pin shutdown current v mpp = v cc 0.1 10 na mpp disable threshold voltage below v cc C1 C0.8 v run threshold - enable reference l 0.15 0.4 0.55 v accurate run threshold - enable switching from v in run pin voltage increasing t j = C40c to 85c (note 4) l 0.585 0.591 0.6 0.6 0.615 0.609 v v accurate run hysteresis 100 mv run input current 0.1 10 na note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the LTC3106 is tested under pulsed load conditions such that t j t a . the LTC3106 e is guaranteed to meet specifications from 0 c to 85c junction temperature. specifications over the C40 c to 125 c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the LTC3106 i is guaranteed over the full C40 c to 125 c operating junction temperature range. the junction temperature ( t j ) is calculated from the ambient temperature ( t a ) and power dissipation ( p d ) according to the formula: t j = t a + (p d )( ja c/w) where ja is the package thermal impedance. note the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. note 3: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. the maximum rated junction temperature will be exceeded when this protection is active. continuous operation above the maximum operating junction temperature may impair device reliability or permanently damage the device. note 4: specification is guaranteed by design and not 100% tested in production. note 5: failure to solder exposed backside of the package to the pc board will result in a higher thermal resistance note 6: voltage transients on the switch pins beyond the dc limits specified in absolute maximum ratings are non-disruptive to normal operation when using good layout practices as described elsewhere in the data sheet and as seen on the demo board. note 7: if pri = gnd, then charging is enabled on v store whenever surplus energy is available from v in . the ov and uv thresholds are the maximum charge and discharge levels controlled by the LTC3106. note 8: some of the ic electrical characteristics are measured in an open-loop test configuration that may differ from the typical operating conditions. these differences are not critical for the accuracy of the parameter and will not impact operation. e lec t rical c harac t eris t ics the l denotes the specifications which apply over the specified junction temperature range, otherwise specifications are at t a = 25c ( note 2). v in = 1.5v , v out = 3.3v , v store = 3.6 v and v aux in regulation unless otherwise noted. ltc 3106 3106f 5 for more information www.linear.com/LTC3106 typical p er f or m ance c harac t eris t ics v in power loss vs load current v in efficiency vs load current v in power loss vs load current v in efficiency vs load current v in power loss vs load current light load power loss vs input voltage (v in ) v in efficiency vs load current v in power loss vs load current v in efficiency vs load current t a = 25c unless otherwise noted. ltc 3106 3106f 100 500 0 10 20 30 40 50 60 70 80 500 90 100 efficiency (%) 3106 g05 v in = 1v v in = 2v v in = 3v v in = 4v v in = 5v v out = 3.3v load current (ma) 0.001 0 0.01 0.1 1 10 100 500 0.01 0.1 1 10 10 100 1k power loss (mw) 3106 g06 v in = 1v v in = 3v v in = 5v v out = 5v 20 load current (ma) 0.001 0.01 0.1 1 10 100 500 0 10 30 20 30 40 50 60 70 80 90 100 efficiency (%) 40 vs load current 3106 g07 v in = 1v v in = 2v v in = 3v v in = 4v v in = 5v v out = 5v load current (ma) 0.001 0.01 0.1 50 1 10 100 500 0.01 0.1 1 10 100 1k 60 power loss (mw) 3106 g08 v in = 1v v in = 3v v in = 5v v out = 1.8v at 10a v out = 5v at 10a v out = 1.8v at 2a v out = 5v at 2a input voltage, v in (v) 0 70 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 v out = 1.8v 80 10 100 1k power loss (w) 3106 g09 90 100 efficiency (%) 3106 g01 v out = 1.8v v in = 1v v in = 3v v in = 5v load current (ma) v in = 1v v in = 2v v in = 3v v in = 4v v in = 5v 0.001 0.01 0.1 1 10 100 500 0.01 0.1 1 load current (ma) 10 100 1k power loss (mw) 3106 g02 v out = 2.2v load current (ma) 0.001 0.001 0.01 0.1 1 10 100 500 0 10 20 30 0.01 40 50 60 70 80 90 100 efficiency (%) 3106 g03 v in = 1v v in = 2v v in = 3v v in = 4v v in = 5v 0.1 v out = 2.2v load current (ma) 0.001 0.01 0.1 1 10 100 1 500 0.01 0.1 1 10 100 1k power loss (mw) 3106 g04 v in = 1v 10 v in = 3v v in = 5v v out = 3.3v load current (ma) 0.001 0.01 0.1 1 10 100 6 for more information www.linear.com/LTC3106 typical p er f or m ance c harac t eris t ics t a = 25c unless otherwise noted. v store /v cap power loss vs load current v store /v cap efficiency vs load current v store /v cap power loss vs load current v store /v cap efficiency vs load current v store /v cap power loss vs load current no load input current vs input voltage v store /v cap efficiency vs load current v store /v cap power loss vs load current v store /v cap efficiency vs load current ltc 3106 3106f 1 50 60 70 80 90 100 efficiency (%) 3106 g14 v out 10 = 3.3v v store /v cap = 4.2v v store /v cap = 3.1v v store /v cap = 2v load current (ma) 0.001 0.01 0.1 1 10 100 100 0.01 0.1 1 10 100 power loss (mw) 3106 g15 v out 0 = 5v load current (ma) 0.001 0.01 0.1 1 10 100 0 10 10 20 30 40 50 60 70 80 90 100 efficiency (%) 20 3106 g16 v store /v cap = 4.2v v store /v cap = 3.1v v store /v cap = 2v v out = 5v /v v store cap = 4.2v 30 v store /v cap = 3.1v v store /v cap = 2v 40 load current (ma) 0.001 0.01 0.1 1 10 100 0.01 0.1 1 50 10 100 power loss (mw) 3106 g17 input voltage (v) 1 2 3 4 5 60 0 2 4 6 8 10 12 14 16 18 v 70 20 input current (a) 3106 g18 80 90 100 efficiency (%) 3106 g10 v out = 1.8v load current (ma) 0.001 0.01 out 0.1 1 10 100 0.01 0.1 1 10 100 power loss (mw) = 1.8v 3106 g11 v store /v cap = 4.2v v store /v cap = 3.1v v store /v cap = 2v v out = 2.2v load current (ma) 0.001 0.01 0.1 1 v store /v cap = 4.2v v store /v cap = 3.1v v store /v cap = 2v 10 100 0 10 20 30 40 50 60 70 load current (ma) 80 90 100 efficiency (%) 3106 g12 v store /v cap = 4.2v v store /v cap = 3.1v v store /v cap = 2v v out = 2.2v load current (ma) 0.001 0.001 0.01 0.1 1 10 100 0.01 0.1 1 10 0.01 100 power loss (mw) 3106 g13 v store /v cap = 4.2v v store /v cap = 3.1v v store /v cap = 2v v out = 3.3v v store /v cap = 4.2v v store /v cap = 3.1v v store /v cap = 2v load current (ma) 0.001 0.1 0.01 0.1 1 10 100 0 10 20 30 40 7 for more information www.linear.com/LTC3106 maximum output current vs input voltage (v in ) maximum output current vs input voltage (v store /v cap ) normalized v in start-up voltage vs temperature maximum output current vs input voltage (v in ) maximum output current vs input voltage (v store /v cap ) normalized v out , accurate run th vs temperature normalized input voltage uvlo vs temperature typical p er f or m ance c harac t eris t ics t a = 25c unless otherwise noted. normalized run threshold vs temperature start-up into resistive load l = 10h ltc 3106 3106f 76 600 r min () 3106 g22 ilimsel = hi v out = 1.8v v out = 2.2v v out = 3.3v v out = 5v input voltage, v in (v) 0 0.5 94 1 1.5 2 2.5 3 3.5 4 4.5 5 1 112 10 100 1k output current (ma) 3106 g23 ilimsel = hi input voltage, v store /v cap (v) 1.5 2 2.5 130 3 3.5 4 4.5 1 10 100 1k output current (ma) 3106 g24 ?40 v out = 1.8v v out = 2.2v v out = 3.3v v out = 5v temperature (c) ?50 ?30 ?10 10 30 50 70 90 ?30 110 130 150 ?12 ?10 ?8 ?6 ?4 ?2 0 ?20 2 4 6 8 percent change (%) 3106 g25 ilimsel = lo input voltage, v in (v) ?10 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 0 5 1 10 100 output current (ma) 3106 g26 v out = 1.8v v out = 2.2v v out = 3.3v v out = 5v ilimsel = lo input voltage, v store /v cap (v) 1.5 10 2 2.5 3 3.5 4 4.5 10 100 output current (ma) 3106 g27 temperature (c) 20 v out = 1.8v v out = 2.2v v out = 3.3v v out = 5v 30 percent change (%) 3106 g19 accurate run threshold v out = 3.3v temperature (c) ?50 ?30 ?10 10 ?50 30 50 70 90 110 130 150 ?0.5 ?0.4 ?0.3 ?32 ?0.2 ?0.1 ?0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 ?14 0.8 0.9 1.0 percent change (%) 3106 g20 temperature (c) ?50 ?30 ?10 10 4 30 50 70 90 110 130 150 ?0.2 ?0.1 ?0.0 22 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 40 percent change (%) 3106 g21 input voltage (v) 0.5 1 1.5 2 2.5 3 3.5 58 4 4.5 5 5.5 0 100 200 300 400 500 8 for more information www.linear.com/LTC3106 no load input current vs input voltage, mpp enabled 5v in to 3.3v out load step 10ma to 300ma 5v in to 3.3v out load step 100a to 40ma boost mode at v in = 1.5v v out = 3.3v, 100ma buck-boost mode at v in = 3.5v v out = 3.3v 100ma buck mode at v in = 4.3v v out = 3.3v, 100ma typical p er f or m ance c harac t eris t ics t a = 25c unless otherwise noted. normalized output voltage regulation vs load current inductor current vs load current normalized mpp output vs temperature ltc 3106 3106f 100 3106 g34 l = 10h c out = 47f i limsel = hi 50s/div v out 100mv/div v aux 20mv/div i l 500 200ma/div 3106 g35 l = 10h c out = 47f i limsel = hi 50s/div v out 100mv/div v aux 50mv/div ?3.0 i l 400ma/div 3106 g36 ?2.5 ?2.0 ?1.5 ?1.0 ?0.5 0 0.5 l = 10h 1.0 load regulation (%) 3106 g28 c out = 47f ilimsel = hi 100s/div il 200ma/div i load 100ma/div 3106 g29 c out = 100f c out = 47f temperature (c) ?50 ?30 ?10 10 30 50 70 90 110 load current (ma) 130 150 ?4 ?3 ?2 ?1 0 1 percent change from 25c (%) 3106 g30 0.001 input voltage (v) 0.4 1.3 2.2 3.2 4.1 5 0 100 200 0.01 300 400 500 600 700 input current (a) 3106 g31 i limsel = hi c out = 47f c out = 100f 0.1 1ms/div v out 200mv/div i load 200ma/div v out 200ma/div 3106 g32 10ma 300ma 1 c out = 47f, i limsel = lo 5ms/div v out 100mv/div i load 20ma/div 3106 g33 40ma 100a 100a 10 l = 10h c out = 47f i limsel = hi 50s/div v out 50mv/div v aux 50mv/div i l 200ma/div 9 for more information www.linear.com/LTC3106 3.3v output voltage ripple vs load current (ilimsel high) 3.3v output voltage ripple vs load current (ilimsel low) 5v output voltage ripple vs load current (ilimsel high) buck mode at v in = 5v v out = 3.3v, 300ma no-load start-up from low power source v store = 0v, v in = run typical p er f or m ance c harac t eris t ics t a = 25c unless otherwise noted. v store to v in switchover 5v output voltage ripple vs load current (ilimsel low) 1.8v output voltage ripple vs load current (ilimsel high) 1.8v output voltage ripple vs load current (ilimsel low) ltc 3106 3106f 1v/div 0.0001 0.001 0.01 0.1 1 10 100 0 25 50 pgood 75 100 125 150 ripple votlage (mv p-p ) 3106 g43 v in = 2v, c out = 47f v in = 5v, c out = 47f v in = 2v, c out = 100f v in = 5v, c out = 100f l = 10h 2v/div load current (ma) 0.0001 0.001 0.01 0.1 1 10 100 1k 0 3106 g38 25 50 75 100 125 150 175 200 ripple votlage (mv p-p ) i load = 30ma 3106 g44 v in = 2v, c out = 47f v in = 5v, c out = 47f v in = 2v, c out = 100f v in = 5v, c out = 100f l = 10h load current (ma) 0.0001 0.001 0.01 0.1 1 10 c out = 47f 100 0 25 50 75 100 ripple votlage (mv p-p ) 3106 g45 v in = 2v, c out = 47f v in = 5v, c out = 47f v in = 2v, c out = 100f v in = 5v, c out = 100f 500s/div l = 10h c out = 47f i limsel = hi 50s/div v out 50mv/div v aux 100mv/div i l 200ma/div v out , 3.3v 3106 g37 200mv/div v store , 3v p in = 100w 100mv/div v in , 2v 100mv/div run 2v/div 3106 g39 l = 10h v in = 2v, c out = 47f v in = 5v, c out = 47f v in = 2v, c out = 100f v in = 5v, c out = 100f load current (ma) 0.0001 v in_oc = 1.8v 0.001 0.01 0.1 1 10 100 1k 0 20 40 v aux charging 60 80 100 120 140 160 180 200 ripple votlage (mv p-p v out charging ) 3106 g40 l = 10h load current (ma) 0.0001 0.001 0.01 0.1 1 10 5s/div 100 0 25 50 75 100 125 150 ripple votlage (mv p-p ) v out , 3.3v 3106 g41 v in = 2v, c out = 47f v in = 5v, c out = 47f v in = 2v, c out = 100f v in = 5v, c out = 100f l = 10h load current (ma) 0.0001 0.001 0.01 0.1 1 10 2v/div 100 1k 0 20 40 60 80 100 120 140 v in 160 180 200 ripple votlage (mv pp ) 3106 g42 v in = 2v, c out = 47f v in = 5v, c out = 47f v in = 2v, c out = 100f v in = 5v, c out = 100f l = 10h load current (ma) 10 for more information www.linear.com/LTC3106 typical p er f or m ance c harac t eris t ics t a = 25c unless otherwise noted. 5v v in to 1.8v v out load step 10a to 50ma 5v v in to 1.8v v out load step 10a to 200ma output voltage ripple 5v v in , 3.3v v out 200ma maximum slew rate vs input voltage maximum output current vs input voltage (v store shelf mode) normalized average minimum operating v store vs temperature maximum output current vs input voltage (v store shelf mode) ltc 3106 3106f 0.1 50mv/div v out (ac) 50mv/div 3106 g47 i limsel = high c out = 47f c out = 100f 10a 10a 200ma 0.2 500s/div i load 200ma/div 100mv/div v out (ac) v out (ac) 100mv/div 3106 g48 0.4 0.5 0.6 0.7 0.8 1.0 1.1 1.2 input voltage v in (v) input voltage slew rate (v/s) 3106 g49 ilimsel = lo input voltage, v store (v) 2 2.5 3 3.5 2.5 4 4.5 10 100 output current (ma) 3106 g51 v out = 1.8v v out = 2.2v v out = 3.3v v out = 5v pri = hi temperature (c) ?50 3 ?30 ?10 10 30 50 70 90 110 130 150 3.5 ?5.0 ?2.5 0 2.5 5.0 7.5 10.0 12.5 15.0 change in v store (%) 4 3106 g52 ilimsel = hi input voltage, v store (v) 1.5 2 2.5 3 3.5 4.5 4 4.5 0.1 1 10 100 1k output current (ma) 3106 g50 v out = 1.8v v out = 2.2v v out = 3.3v v out = 5v 5 i limsel = high c out = 100f 100s/div i l 500ma/div v out 100mv/div v aux 100mv/div 3106 g46 vaux charging 0 i limsel = low c out = 47f c out = 100f 10a 10a 50ma 500s/div i load 50ma/div v out (ac) 11 for more information www.linear.com/LTC3106 p in func t ions (qfn/tssop) nc (pin 1/pin 4): no connect. not electrically connected internally. may be connected to pcb ground or left floating. v out ( pin 2/pin 3): programmable output voltage. connect at least a 22 f low esr capacitor to gnd as close to the part as possible. capacitor size may increase depending on output voltage ripple and load current requirements. v aux ( pin 3/pin 5): auxiliary voltage. this pin is a generated voltage rail used to power internal circuitry only. connect a 2.2 f minimum ceramic capacitor to gnd as close to the part as possible. larger capacitors may also be used depending on the application start-up requirements. if larger capacitors are used maintain a minimum 10:1 v out to v aux capacitor value ratio. v cc (pin 4/pin 6): internal supply rail. do not load. used for powering internal circuitry and biasing the program- ming inputs only. decouple with a 0.1 f ceramic capacitor placed as close to the part as possible. os1, os 2 (pins 5, 6/pins 7, 8): v out select programming inputs. connect the pins to ground or v cc to program the output voltage according to table 1. pgood (pin 7/pin 9): power good indicator. open-drain output that is pulled to ground if v out falls 8% below its programmed voltage. the pgood pin is not actively pulled to ground in shutdown. if pulled high the pgood pin will float high and will not be valid until 3.5 ms after the part is enabled. mpp (pin 8/pin 10): set point input for maximum power point control. connect a resistor from mpp to gnd to program the activation point for the mpp comparator. to disable the mpp circuit, connect mpp directly to the v cc pin. ss1, ss 2 (pins 10, 9/pins 12, 11): v store select pro- gramming inputs. connect the pins to ground or v cc to program the v store voltage range according to table 2. only valid if pri is low. tie both to ground if pri is high. pri (pin 11/pin 13): primary battery enable input. tie to v cc to enable the use of a non-rechargeable primary bat- tery and to disable v store pin charge capability. ss[1:2] are ignored if pri = v cc . tie to gnd to use a secondary battery and enable charging. ilimsel (pin 12/pin 14): current limit input select. tie to gnd to disable the automatic power adjust feature and operate at the lowest peak current or tie to v cc to enable the power adjust feature for operation at higher peak inductor currents. run (pin 13/pin 15): input to enable the ic and to set custom v in undervoltage thresholds. there are two thresholds on the run pin. a voltage greater than 400mv (typ) will enable certain internal ic functions. the accurate run threshold is set at 600 mv and enables v in as an input. tie this pin to v in or connect to an external divider from v in to provide an accurate undervoltage threshold. tie to >600 mv to allow sub-600mv operation from v in . the accurate run pin threshold has 50 mv of hysteresis provided internally. envstr (pin 14/pin 16): enable v store input. tie to v store to enable v store as a backup input. grounding this pin disables the use of v store as a backup input source. gnd (pin 15/pin 17 and pin 21 exposed pad): connect to pcb ground for internal electrical ground connection and for rated thermal performance. v in ( pin 16/pin 18): main supply input. decouple with minimum 10 f capacitor. input capacitor value may be significantly larger (>100 f) depending on source imped - ance and load requirements. if larger capacitors are used a 1f min ceramic capacitor should be also placed as close to the v in pin as possible. sw1, sw 2 (pins 18, 17/pins 20, 19): buck-boost con- verter switch pins. connect inductor between sw1 and sw2 pins. v store (pin 19/pin 1): secondary supply input. a primary or secondary rechargeable battery may be connected from this pin to gnd to power the system in the event the input voltage is lost. when pri pin is low, current will be sourced from this pin to trickle charge the storage element up to the maximum selected storage voltage. when pri is high no charging will occur. tie this pin to v cap for primary ltc 3106 3106f 12 for more information www.linear.com/LTC3106 b lock diagra m + ? start logic, control logic and state machine v best cntrl thermal shutdown v store comp v cap ss1 v in v store v cap ss2 run pri envstr ilimsel gnd 600mv 600mv 400mv 600mv voltage reference pwr adj + ? + ? uvlo comp 600mv v in 600mv fb 1.5a mpp output current v cc adj mpp os2 os1 v out v in + ? pgood comp mpp comp v out v ref + ? run comp sleep comp + ? accurate run comp v cc v best swd1 swb swa1 vstr_en v out v aux swa2 vstr_en v best swd2 v best v cap v in v out auxsw pgood 3106 bd + ? v in adj i peak detect i val /i zero detect adj v aux v store drivers + ? + ? sw1 sw2 v best swc or high capacity secondary battery applications. for low capacity sources only tie v store directly to the battery. tie to gnd if unused. v cap (pin 20/pin 2): v store isolation pin. isolates v store from the decoupling capacitor for low capacity backup batteries. tie to v store for primary or high capacity secondary battery applications. decouple to gnd with a capacitor large enough to handle the peak load current from v store . tie to gnd if unused. p in func t ions (qfn/tssop) ltc 3106 3106f 13 for more information www.linear.com/LTC3106 simplified operational flow chart using accurate run with primary battery backup o pera t ion 3106 sd01 v best * > 1.5v (max) v in > v in start-up voltage (0.85v typ) envstr > 0.8v and/or run > enable threshold (0.4v typ) envstr = v store = v cap run = v in or external divider tap pri = hi v aux > v aux threshold v out > 1.2v (typ) * v best is the greater of v aux , v in , v store , v out ** v in(turnon) = 0.6v ? (1 +r1/r2) synchronous switching v store > v store(min) yes yes no v in > acc. run threshold or v in > v in(turnon) ** asynchronous start-up shutdown no no 1 start complete/sleep yes yes yes no v aux > 5.2v (typ) v out in regulation no yes no 1 ltc 3106 3106f 14 for more information www.linear.com/LTC3106 simplified operational flow chart using v in uvlo with primary battery backup o pera t ion 3106 sd02 v best * > 1.5v (max) v in > v in start-up voltage (0.85v typ) envstr > 0.8v and/or run > enable threshold (0.4v typ) envstr = v store = v cap run > 0.6v (typically tied to v store ) pri = hi v aux = v aux threshold v out > 1.2v (typ) * v best is the greater of v aux , v in , v store , v out synchronous switching v store > v store(min) yes no v in > v in(uvlo) 0.3v (typ) asynchronous start-up shutdown no no 1 start complete/sleep yes yes yes no v aux > 5.2v (typ) v out in regulation no yes no 1 ltc 3106 3106f 15 for more information www.linear.com/LTC3106 o pera t ion simplified operational flow chart using accurate run with rechargeable battery backup 3106 sd03 v best * > 1.5v (max) v in > v in start-up voltage (0.85v typ) envstr > 0.8v and/or run > enable threshold (0.4v typ) envstr = v store = v cap run = v in or external divider tap pri = gnd v aux = v aux threshold v out > 1.2v (typ) * v best is the greater of v aux , v in , v store , v out ** v in(turnon) = 0.6v ? (1 + r1/r2) *** v store is locked out as an input until v aux = v aux th, if v store is less than v store(uv) when LTC3106 is first enabled synchronous switching v store(uv) < v store < v store(ov) or no if v store locked out*** yes yes no v in > acc. run threshold or v in > v in(turnon) ** charge v store asynchronous start-up shutdown no no 1 start complete/sleep yes yes yes no v aux > 5.2v (typ) v out in regulation no yes yes v store > v store(ov) no 1 no ltc 3106 3106f 16 for more information www.linear.com/LTC3106 o pera t ion 3106 sd04 v best * > 1.5v (max) v in > v in start-up voltage (0.85v typ) envstr > 0.8v and/or run > enable threshold (0.4v typ) envstr = v store = v cap run > 0.6v (typically tied to v store ) pri = hi v aux = v aux threshold v out > 1.2v (typ) * v best is the greater of v aux , v in , v store , v out *** v store is locked out as an input until v aux = v aux th, if v store is less than v store(uv) when LTC3106 is first enabled synchronous switching v store(uv) < v store < v store(ov) or no if v store locked out*** yes yes no v in > v in (uvlo) 0.3v (typ) charge v store asynchronous start-up shutdown no no 1 start complete/sleep yes yes yes no v aux > 5.2v (typ) v out in regulation no yes yes v store > v store(ov) no 1 no simplified operational flow chart using v in uvlo with rechargeable battery backup ltc 3106 3106f 17 for more information www.linear.com/LTC3106 o pera t ion introduction the LTC3106 is a high performance two input, synchro- nous buck -boost converter with low quiescent current over a wide input voltage range ( refer to graph g18). the powerpath control architecture allows the use of a single inductor to generate a user selectable fixed regulated output voltage through seamless transition between either of the two power inputs. if input power is available (v in ) or the backup battery is present (v store ), the buck-boost regulator will operate from v in providing up to 300 ma to the load. should the v in source become unavailable the regulator will select v store /v cap as its input delivering up to 90 ma to the load. if a rechargeable battery is used as the backup source, a low current recharge power path is also provided allowing use of excess input energy to charge the backup source if the output voltage is in regulation. user selectable upper and lower thresholds are available to handle multiple battery chemistries and to protect the battery from overcharge/deep discharge. charging can be externally disabled using the pri pin for use of a primary battery as the backup source. v in the main input voltage, v in , can be configured to operate over an extended voltage range to accommodate multiple power source types including but not limited to high im - pedance sources. an accurate run pin allows predictable regulator turn-on at a specified input voltage. optional maximum power point control ( mppc) capability is also integrated into the LTC3106. either can be used to ensure maximum power extraction from non- ideal power sources . v store /v cap a backup source can be tied to v store . as shown in the block diagram, v store can be isolated from v cap by the isolation switch for near zero current draw requirements and lower output current levels. when using the isolation feature the ilimsel pin should be tied to ground due to the increased series resistance the isolation switch adds. for typical secondary and primary battery backup appli - cations isolation is not needed, v store and v cap should be shorted together. in this configuration the ilimsel feature can be used to increase output current to higher. both configurations are shown in figure?1. in either con- figuration, v cap is always enabled at start-up if envstr is high to determine if v cap is within the programmed voltage range. if v cap is below the lower threshold it is latched off during start-up to minimize quiescent current draw from v cap . since the voltage on v cap is continually monitored a very small 100 na typical quiescent current will persist with v cap in shutdown ( envstr tied to gnd). figure 1. v store /v cap configurations shutdown either input source can be enabled independently or to- gether. bring envstr below the worst-case logic thresh- old of 0.3v to disable v store /v cap as input or output if charging is enabled ( pri low). bringing envstr below 0.3v will also turn off the isolation switch if the LTC3106 is configured to isolate v store from v cap . a low voltage logic input on the run pin enables some circuit functions at 400 mv typical while an accurate com - parator enables v in as an input. to disable v in as an input, run must be below the accurate run threshold of 600mv (typ). to put the LTC3106 in shutdown mode the envstr pin must be below 0.3 v and the run pin must be brought below the worst-case low level logic threshold of 150mv. accurate run pin if run is brought below the 500 mv accurate comparator falling threshold, the buck-boost converter will inhibit switching from v in . certain control circuits will remain powered unless run is brought below its low level logic threshold of 400 mv. a small amount of current draw on v in will still remain in this mode. v store v cap ilimsel backup power v cc for i peak = 170ma gnd for i peak = 100ma LTC3106 nonisolated v store /v cap i shdn = 100na v store v cap ilimsel backup power LTC3106 isolated v store /v cap i shdn = 0.1na i peak = 100ma 3106 f01 ltc 3106 3106f 18 for more information www.linear.com/LTC3106 with the addition of an optional resistor divider as shown in figure 2, the run pin can be used to establish a user programmable turn- on and turn- off threshold. this feature can be utilized to set an application specific v in undervolt- age threshold or to operate the converter from v in in a hiccup mode from very low power sources. if v store /v cap is available as a backup power source, v in input power priority over v store /v cap is only given if the run pin is above the accurate threshold. o pera t ion v out . when the v aux voltage drops to 5.1 v typical, input power is briefly diverted to recharge v aux . v out the main output voltage on v out can be powered from either input power source and is user programmed to one of four regulated voltages using the voltage select pins os1 and os2, according to table 1. it is recommended that os1 and os2 be tied to either ground or v cc . table 1. output voltage selection os1 os2 output voltage 0 0 1.8v 0 v cc 2.2v v cc 0 3.3v v cc v cc 5v v cc an internal decision circuit determines the voltage on the v cc pin. v cc is the highest voltage of either v in , v cap , v out or v aux . although the v cc decision circuit is always active, when start-up is complete during normal operation v aux will equal v cc . v cc should be decoupled with a 0.1f capacitor placed as close as possible to the v cc pin. v cc is not designed to source or sink current externally. v cc may be used to terminate the LTC3106 logic inputs but should not otherwise be externally loaded. high capacity secondary battery backup short v store to v cap for high capacity (>5 mah) backup power sources such as rechargeable lithium coin cell batteries, or primary batteries as shown in figure 3. to accommodate a variety of battery chemistries and maximum voltages the v store /v cap over and undervoltage thresholds are user programmed to one of four voltage ranges using the v store /v cap select pins ss1 and ss2, according to table 2. table 2. v store voltage selection pri ss1 ss2 v store / v cap ov v store / v cap uv battery type 0 0 0 4v 2.78v li carbon 0 0 v cc 2.9v 1.9v 2x rechargeable nimh 0 v cc 0 3v 2.15v rechargeable li coin cell 0 v cc v cc 4v 3v li polymer/graphite v cc 0 0 4.2v 2.1v primary, non-rechargeable v in 0.6v enable v in accurate run comp LTC3106 3106 f02 low voltage logic thresh run r1 r2 enable v ref , clear shutdown 0.4v + ? + ? figure 2. accurate run pin comparator the v in input is enabled when the voltage on run exceeds 0.6v ( nominal). therefore, the turn-on voltage threshold on v in can be set externally and is given by: v in(turnon) = 0.6v ? 1 + r1 r2 ? ? ? ? ? ? the run comparator includes a built-in hysteresis of ap- proximately 100 mv, so that the typical turn-off threshold will be; v in(turnoff) = 0.5v ? 1 + r1 r2 ? ? ? ? ? ? v aux v aux is charged up during start-up and is also refreshed as necessary from v in or v store /v cap during normal operation. once v aux is fully charged or greater than either input voltage source it will power the LTC3106 active circuitry. the v aux pin should be bypassed with a minimum 2.2 f capacitor. once v aux reaches 5.2v (typ), v out is allowed to start charging. although minimized by design techniques the single inductor architecture allows some parasitic asynchronous charging of v aux . an internal shunt regulator limits the maximum voltage on v aux to 5.5 v typical and shunts any excess current to ltc 3106 3106f 19 for more information www.linear.com/LTC3106 o pera t ion if secondary battery charging is enabled (pri = gnd) with both the output and v aux voltages in regulation, available input power will be diverted to v store /v cap to trickle charge the backup power source with a 30ma typical current limit. overcharging of the input source is prevented by the upper limit threshold setting. figures 3 and 4 show an additional schottky diode (d1) from sw2 to v aux . when charging is enabled (pri = gnd) the addition of a schottky diode from sw2 to v aux is necessary to prevent a v out regulation error caused by the small parasitic output current resulting from the LTC3106 charging the secondary battery on v store /v cap . the additional diode allows for some inrush current to the v aux capacitor c 3 from either input source that would have otherwise been blocked by the auxsw . figure 5 shows an alternate schottky diode configuration with two additional external components, q1 and c4, that will still eliminate the v out regulation error but will also significantly reduce the inrush current. low capacity secondary battery and true isolation for very low capacity batteries an isolation switch between v store and v cap provides for true input source isolation and near zero current draw (<1 na) on v store . as shown in figure 4, simply connect v cap to a bulk capacitor and v store to the isolated source. tie envstr to ground to isolate v store . although adequate for most low capacity sources such as solid state or small li-ion polymer bat- teries, the current available to the output from v store in this configuration will be reduced. to enable v store as an input and prevent a significant increase in the quiescent current, it is recommended that envstr terminate to v store or to a voltage greater than v store . primary battery the LTC3106 pri input allows the user to disable secondary battery features such as trickle charging on v store so that a primary battery may be used in the absence of sufficient power from the harvested source on v in . the sw2 to v aux schottky diode is not required or recommended with the primary function enabled. with pri tied to v cc , the v store input voltage range ignores the state of the ss1 and ss2 pins and operates over the wide voltage range of 2.1 v to 4.3v. to use the highest peak current capability v store should be tied to v cap in this configuration. to start the LTC3106 from v store /v cap , v store /v cap must be greater than 2.1 v nominally. during an output short (v out < 1.1v) a small v store reverse current of 20a ( typical) will be figure 3. high capacity battery configuration (shown with v store enabled) figure 4. low capacity battery configuration (shown with v store disabled, envstr tied to ground) figure 5. rechargeable battery configuration with inrush current limiting + + input source rechargeable backup source LTC3106 v in v cap v aux pri sw1 sw2 v store envstr 3106 f03 c1 c2 c3 d1 l1 + + input source rechargeable low capacity source LTC3106 v in v cap v store envstr 3106 f04 c1 en dis c2 v aux pri sw1 sw2 c3 d1 l1 + + input source backup source LTC3106 v in v cap v store envstr 3106 f05 c1 c2 v aux pri sw1 sw2 4.7f d1 q1 l1 0.1f ltc 3106 3106f 20 for more information www.linear.com/LTC3106 o pera t ion present. if an extended duration output short is expected, protection for the primary battery should be considered. start-up the LTC3106 will start up from either input voltage source but gives priority to v in . the aux output is initially charged with the synchronous rectifiers disabled. once v aux has reached its terminal voltage the output voltage is then also charged asynchronously until v out reaches approximately 1.2v. the converter then leaves the asynchronous mode in favor of a more efficient synchronous start-up mode until v out is in regulation and the part enters normal operation. it is normal for the output voltage to rise as v aux is charging. the auxsw switch and the swdi switch are in parallel so even when switched off there is still some asynchronous body diode conduction to the output. the rate at which this occurs is related to the v aux /v out output capacitor ratio and operating conditions at start-up ( i.e., any static load on v out ). a minimum 10:1 ratio of v out to v aux cap is recommended to allow for proper start-up. starting from very low current input sources many solar cells that are optimized for indoor use have very low available power at low light levels and therefore very low output current, often less than 100 a at 200lux. if the LTC3106 is to start up using only a weak source on v in and with no back up battery on v store the input capaci - tance must be sized larger than that for normal operation. although dependent on the specific operating conditions for the application, in general, starting from low current sources on v in at low light levels alone will require larger input capacitances than those calculated using the c vin equation in the v in and v out capacitor selection section. for example if the LTC3106 application in figure 14 needs to start from the am-1454 solar cell without the benefit of a battery on v store , the required input capacitance increases from 470f to 2.2mf minimum. if a battery is connected to v store but is disabled by bringing envstr low and is therefore not used to start the LTC3106, the input source on v in needs to have an output current equal to or greater than 100a ( typ) regardless of the input capacitor size for the internal v cc decision circuit to run properly during start up. if the input source has less than a 100 a capability, startup could stall until more input current is available from the source or until the v store battery is enabled. the 100 a limitation also applies where the LTC3106s output is used to charge a battery or a large super capacitor. for typical applications where the input capacitance is greater than the output capacitance the 100a limitation does not apply. operating from a low power v in controlling the minimum input voltage is essential when using high impedance or intermittent input sources. the LTC3106 has several options for v in voltage control during start-up and during normal operation. if a valid v store voltage exists or if v aux is in regulation, there are several LTC3106 configurations allowing accu- rate control at lower input voltages on v in . the accurate run comparator can be used to control the v in turn-on threshold at any arbitrary voltage equal to or above 600mv as discussed in the accurate run pin section of this data sheet. the 300 mv uvlo on v in could also be used to maintain v in but is fixed at the 300 mv threshold. if a higher sleep current can be tolerated, the mpp pin can be used to control v in at any arbitrary threshold above 300mv. these latter two methods of controlling v in are discussed in later sections of the data sheet. even if no other input source is present (v store /v cap disabled, not used or too low), a crude v in comparator will control v in during start-up. if the run pin is tied to v in or held above the run enable threshold (>0.4 v typ) the LTC3106 has a typical start-up voltage of 0.85v with input currents as low as 15 a or ~12 w of input power. if the source impedance is high enough to cause v in to drop below the v in comparator threshold, start-up is terminated until the input capacitance is again charged to approximately 0.85 v. operation continues in this manner until start-up is complete. input source impedance due to the source itself or due to the input sources expected environmental conditions determine the required size of the input capacitance on v in to facilitate a successful start-up. recommendations are presented in the input capacitor selection and typical applications sections of this document. ltc 3106 3106f 21 for more information www.linear.com/LTC3106 boost mode buck-boost mode buck mode v out i max i peak i valley i zero v in v in t off t off t off ac ac ac ad ad ad ad ad ad ad ac ac bd bd bd bd bd 3106 f06 v in v out a b c d1 sw1 sw2 l figure 6. operating voltage and current waveforms o pera t ion normal operation when v aux is in regulation (~5.2 v) and v out is greater than 1.2 v typical, the converter will enter normal operation. always prioritizing v in over v cap , the integrated powerpath control circuitry provides seamless transition between input sources as needed to maintain regulation of the output voltage and to periodically recharge v aux . an accurate comparator is used to monitor the output volt- age as it continues to charge to one of the user selected fixed output voltage values. if v out is above this voltage value no switching occurs and only quiescent current is drawn from the power source ( sleep mode). when v out drops below the fixed output voltage the LTC3106 wakes up, switching commences, and the output capacitor is again charged. the value of the output capacitor, the load current, input source and the output voltage comparator hysteresis (~1%) all determine the number of current pulses required to pump up the output capacitor before the part returns to sleep. normalized input and output voltages in the various modes as well as typical inductor current waveforms are shown in figure 6. only v in is shown but the v store /v cap power path have the same architecture. regions of the current waveforms where switches a and d are on provide the highest efficiency since energy is transferred directly from the input source to the output. boost mode when v in < v out C 300 mv, the LTC3106 operates in boost or step-up mode. referring to figure 6 when v out falls below the programmed regulation voltage, switches a and c are turned on (v in is applied across the induc- tor) and current is ramped until i peak is detected. when this occurs, c is turned off, d is turned on and current is delivered to the output capacitor (v in C v out is applied across the inductor). inductor current falls when d is on, until an i valley is detected. terminating at i valley results in an increased load current capability for a given peak current. this ac then ad switch sequence is repeated until the output is pumped above the programmed regulation voltage, a final i valley is detected, and the part returns to sleep mode. buck mode when v in > v out + 700 mv, the LTC3106 operates in buck or step-down mode. at the beginning of a buck mode cycle (figure 6 right side) switches a and d are turned on ( v in C v out is applied across the inductor), current is delivered to the output and ramped up until i peak is detected. when this occurs, a is turned off, b is turned on and inductor current falls (Cv out across the inductor) until an i valley is detected. this ad then bd switch sequence is repeated ltc 3106 3106f 22 for more information www.linear.com/LTC3106 until the output is pumped above its regulation voltage, a final i valley is detected, and the part returns to sleep mode. buck-boost mode if (v out C 700mv) < v in < (v out + 300 mv), the LTC3106 operates in 4- switch step-up/step-down mode. returning to figure 6 ( center) when v out falls below its regulation voltage, switches a and c are turned on and current is ramped until i peak is detected. as with boost mode opera- tion, c is then turned off, d is turned on and current is delivered to the output. when a and d are on, the inductor current slope is dependent on the relationship between v in , v out , and the r ds(on) of the switches. in 4-switch mode, a t off timer is used to terminate the ad pulse. once the t off timer expires, switch a is turned off, b is turned on, inductor current is ramped down and v out is applied across the inductor until i valley is detected. this sequence is repeated until the output is regulated, bd switches are turned on, and a final i valley is detected. anti-cross conduction circuitry in all modes ensures the p-channel mosfet and n-channel mosfet switch pairs (a and b or d and c) are never turned on simultaneously. note all three operational modes function the same if pow - ering from v store /v cap when v in is not available. simply consider v in in the preceding paragraphs as v store /v cap . undervoltage lockout (uvlo) and very low v in operation there is an undervoltage lockout ( uvlo) circuit within the LTC3106 to allow very low voltage v in operation. if the LTC3106 is configured so that the run pin is externally driven to a voltage greater than the 600 mv ac - curate run threshold, the v in uvlo function allows the input voltage to remain viable as an input source down to ~250 mv. below this threshold v in is disabled and the input source will transition to v store /v cap , assuming v store /v cap is within its programmed range, until v in rises above ~300 mv, where input power again transitions to v in . the v in input is always given priority over the v store / v cap input if v in is viable. o pera t ion figure 7. mpp configurations maximum power point operation as an alternative to using an external divider on the run pin ( or for maximum power point thresholds below the 600mv run pin threshold) the maximum power point con - trol cir cuit allows the user to set the optimal input voltage operating point for a given power source. the mpp circuit hysteretically regulates the average v in voltage to the mpp threshold. when v in is greater than the mpp voltage, input power is taken from v in to supply the load. if the v in power source does not have enough power for the load it will decrease. when v in is less than the mpp threshold voltage the input transitions to v store /v cap if available. v in power may then recharge the input capacitor voltage and as it rises above the mpp threshold the process repeats. v in mpp regulation is then maintained using this burst technique. if v store is disabled or in undervoltage, no switching occurs until v in again rises above the mpp threshold and only quiescent current is drawn from the power source (same as sleep mode). to set the mpp threshold a 1.5a ( typical) source current is provided at the mpp pin. an external resistor to ground allows an arbitrary mpp threshold voltage setting. see figure 7. mpp 1.2a r3 3106 f07 LTC3106 i q = 10.5a mpp funcion enabled mpp v cc LTC3106 i q = 1.5a mpp funcion disabled note that when the mpp function is used the nominal quiescent current increases from 1.5a ( typical) to 10.5a (typical). to disable the mpp feature and eliminate the additional i q , simply tie mpp to v cc . pgood comparator the LTC3106 provides an open-drain pgood output that pulls low if v out falls more than 10% ( typical) below its programmed value. when v out rises to within 8% (typical) of its programmed value, the internal pgood pull-down ltc 3106 3106f 23 for more information www.linear.com/LTC3106 figure 8. inductor current changing as a function of load o pera t ion will turn off and pgood will go high if an external pull- up resistor has been provided. an internal deglitch filter prevents nuisance trips of pgood due to short transients (<15s typically) on v out . note that pgood can be pulled up to any voltage, as long as the absolute maximum rat- ing of 6v is not exceeded, and as long as the maximum sink current rating is not exceeded when pgood is low. the pgood pin is not actively pulled low in shutdown. if pulled high the pgood pin will float high and will not be valid until 3.5ms after the part is enabled. power adjust feature the LTC3106 ilimsel option enables a feature that maxi - mizes efficiency at light load while providing increased power capability at heavy load by adjusting the peak and valley of the inductor current as a function of load. lowering the peak inductor current for either input source at light load optimizes efficiency by reducing conduction losses in the internal mosfet switches. as the load increases, the peak inductor current is automatically increased to a maximum of 650 ma for v in and 150 ma for v store /v cap . at intermediate loads, the peak inductor current may vary from 90 ma to 650 ma. figure 8 shows an example of how the inductor current changes as the load increases. the valley of the inductor current is automatically adjusted as well to maintain a relatively constant inductor ripple current. this keeps the switching frequency relatively constant with load. the burst frequency ( how often the LTC3106 delivers a burst of current pulses to the load) is determined by the internal hysteresis ( output voltage ripple), the load current and the amount of output capaci - tance. all burst mode operation, or hysteretic converters, will en ter the audible frequency range when the load is light enough. however, due to the low peak inductor current at light load, circuits using the LTC3106 do not typically generate any audible noise. note that the power adjust feature is overridden by the mpp function. to maximize efficiency for very high impedance input sources, low frequency pulsed load or low load current applications, the power adjust feature may be disabled using the ilimsel pin keeping the peak currents limited to 90ma. see table 3 for ilimsel configurations. table 3. current limit adjustment ilimsel v in peak i limit (ma) v store peak i limit (ma) 0 100 100 v cc 650 170 energy storage harvested energy can be stored on the input capacitor, the output capacitor or if enabled, on the backup storage element on v store . the wide input voltage range takes advantage of the fact that energy storage on the input capacitor is proportional to the square of the capacitor voltage. after the output voltage is brought into regulation any excess energy is stored on the input capacitor and its voltage increases. if v store charging is enabled ( pri pin grounded) excess energy will first be used to recharge the backup power source before storing energy on the input capacitor. the v out capacitor should be a minimum of 47 f. a larger output capacitor can be used if lower peak to peak output voltage ripple is desired. a larger output capacitor will also improve load regulation on v out but will result in higher peak currents than necessary at light load lowering the light load efficiency. ltc 3106 3106f 100ma/div 3106 f08 c out = 47f, ilimsel = hi 100s/div il 200ma/div i load 24 for more information www.linear.com/LTC3106 a pplica t ions i n f or m a t ion a standard application circuit for the LTC3106 is shown on the front page of this data sheet, although the LTC3106 can be configured to work from a variety of alternative energy and backup battery sources. the appropriate selection of external components is dependent upon the required performance of the ic in each particular application. this section of the data sheet provides some basic guidelines and considerations to aid in the selection of external com - ponents and the design of the applications circuit, as well as a few other application circuit examples. v store /v cap capacitor selection if there is insufficient power on v in , the v store /v cap input carries the full inductor current and provides power to internal control circuits in the ic. to minimize v store voltage ripple and ensure proper operation of the ic, a low esr bypass capacitor with a value of at least 4.7 f should be located as close to the v cap pin as possible. the traces connecting this capacitor to v cap and the ground plane should be made as short as possible. in cases where the series resistance of the battery is high or the LTC3106 is powered by long traces or leads, a larger value bulk input capacitor may be required and is generally recommended. in such applications a 47 f to 100 f low esr electrolytic capacitor in parallel with a 1 f ceramic capacitor generally yields a high performance, low cost solution. note that if there is sufficient power on v in only capacitor leakage current and shutdown current will be drawn from the v store /v cap source. when using the shelf mode feature, the v store pin should be isolated from the v cap pin and no capacitor is needed on the v store pin. instead the bypass capacitor should be located only on the v cap pin. v in and v out capacitor selection the LTC3106 has no maximum capacitance limitation on v in or v out but there is a slew rate limitation on v in that drives the need for a minimum input capacitance. refer to the plot of maximum slew rate vs input voltage in the typical performance characteristics section. for general applications where the input source has a low impedance and relatively high output power, a minimum 22 f ceramic capacitor is recommended between v in and gnd. in ap- plications where the input has a high impedance and may be intermittent, such as in energy harvesting applications, the total v in capacitor value will be selected to optimize the use of the harvested source and will typically be greater than 100f. in energy harvesting applications the v in and v out capaci- tors should be selected to optimize the use of the harvested source. input capacitor selection is highly important if the LTC3106 must start from a, high source resistance system on v in . when using bulk input capacitors that have high esr, a small valued parallel ceramic capacitor should be placed between v in and gnd as close to the converter pins as possible. after v aux and the output voltage are brought into regulation any excess energy is stored on the input capacitor and its voltage will increase. care should be taken to ensure the open-circuit voltage of the harvested source does not exceed or is appropriately clamped to the maximum operating voltage v in and that the input capacitor is rated for that voltage. for pulsed load applications, even low power pulsed load applications such as eterna ? ble, zigbee as well as other proprietary low power rf protocols, the input capacitor should be sized to store enough energy to provide out- put power for the duration of the load profile. if enough energy is stored so that v in does not reach the chosen falling threshold during a load transient then the v store / v cap current will be minimized thereby maximizing battery life. spacing load transients so that the average power required to service the application is less than or equal to the power available from the energy harvesting source will also greatly extend the life of the battery. the following equation can be used to size the input capacitor to meet the power requirements of the output for the desired duration: c vin = 2/ ? v out ? i n t n ( ) v inov 2 C v inuv 2 ( ) f ( ) here is the average efficiency of the converter over the input voltage range and v in is the input voltage when the converter begins to switch. typically v in(ov) will be the selected input voltage rising threshold. v in( uv) is the v in( ov) minus the hysteresis voltage . i n t n is the area under each of the load pulses for given load profile. this equation may overestimate the input capacitor necessary. it may be ltc 3106 3106f 25 for more information www.linear.com/LTC3106 a pplica t ions i n f or m a t ion acceptable to allow the load current to deplete the output capacitor all the way to the lower pgood threshold. the equation also assumes that the input source charging has a negligible effect during this time. example uses of this equation to size input capacitors are included in the design examples later in this section. the duration for which the regulator sleeps depends on the load current and the size of the v out capacitor. the sleep time decreases as the load current increases and/ or as the output capacitor decreases. the v out capaci - tor should be a minimum of 47f . a larger output capacitor can be used if lower peak-to-peak output voltage ripple is desired. a larger output capacitor will also improve load regulation on v out . multilayer ceramic or low esr electrolytic capacitors are both excellent options. proper sizing of the input capacitor to optimize energy storage at the input utilizes the potential for higher input voltages and higher efficiency. ultimately the output current is limited by what the converter can supply from its input. if a larger peak transient load needs to be serviced, the output capacitor should be sized to support the larger cur- rent for the duration of the load transient by the following: c out i load ? t pulse v droop c out is the output capacitor value ( f) required, i load is the peak transient load current ( ma), t pulse is the duration of that transient ( ms) and v droop is the amount of voltage droop the circuit can tolerate (both in v). for many of the LTC3106 applications, the input capaci - tor values can be quite large (>1 mf). a list of high value storage capacitor manufactures is listed in table 4. for larger bulk output capacitors an additional low effective series resistance ( esr) output capacitor of 10 f should be added and connected as close to the ic pin as possible. regardless of its value, the selected output capacitor must be rated higher than the voltage selected for v out by os1 and os2. likewise the selected input capacitor must be rated higher than the open- circuit voltage of the v in source . table 4. recommended bulk storage capacitor vendors vendor part avx bestcap series taj , tps series tantalum vishay 595d series (tantalum) 153 c rv (aluminum, low leakage) 150 crz (aluminum, low leakage) 196 dlc (double layer aluminum) illinois capacitor rkr series (aluminum, low leakage) dcn series cooper bussman kr series kw series pa , pb, pm, ph series cap-xx g series (dual cell) h series (dual cell) v cc capacitor selection the v cc output of the LTC3106 is generated from the great - est of v in , v cap , v aux or v out . a low esr 0.1 f capacitor should be used. the capacitor should be located close to the v cc pin and through the shortest ground traces possible. v aux capacitor selection a minimum 2.2 f low esr capacitor must be used to decouple v aux although 4.7 f is more typical for many applications. smaller capacitor sizes help reduce v out ripple especially at high load currents while larger capacitor sizes improve start-up at low output voltages. the capaci - tor should be located as close to the v aux pin as possible. as mentioned in the operations section the aux d switch and the v out d switch are in parallel. asynchronous diode conduction will occur when either v aux or v out is being serviced by the buck/boost circuitry. for this reason it is recommended to keep a 10:1 ratio of v out to v aux capacitor to ensure a proper start-up with low voltage, high impedance sources. under most load conditions the output voltage will be maintained normally although under true zero load conditions (<500 na) the parasitic current from v aux to v out could force v out to regulate up to 5% higher than typical. ltc 3106 3106f 26 for more information www.linear.com/LTC3106 a pplica t ions i n f or m a t ion use of ceramic capacitors to minimize losses in low power systems all capacitors should have low leakage current. ceramic capacitors are recommended for use in LTC3106 applications due to their small size, low esr and low leakage currents. however, many ceramic capacitors intended for power applications experience a significant loss in capacitance from their rated value as the dc bias voltage on the capacitor increases. it is not uncommon for a small surface mount capacitor to lose more than 50% of its rated capacitance when operated at even half of its maximum rated voltage. this effect is generally reduced as the case size is increased for the same nominal value capacitor. as a result, it is often necessary to use a larger value capacitance or a higher voltage rated capacitor than would ordinarily be required to actually realize the intended capacitance at the operating voltage of the application. x5r and x7r dielectric types are recommended as they exhibit the best performance over the wide operating range and temperature of the LTC3106. to verify that the intended capacitance is achieved in the application circuit, be sure to consult the capacitor vendor s curve of capacitance versus dc bias voltage. pgood output the pgood output can also help with power manage - ment. pgood transitions high the first time the output reaches regulation and stays high until the output falls to 92% of the regulation point. pgood can be used to trigger a system load. for example, a current burst could begin when pgood goes high and would continuously deplete the output capacitor until pgood went low. note the pgood pin will remain high if the output is still within 92% of the regulation point, even if the input falls below the lower uvlo threshold. inductor selection low dcr power inductors with values between 4.7 h and 10 h are suitable for use with the LTC3106. inductor vendor information can be found in table 5. for most applications, a 10 h inductor is recommended. in applications where the input voltage is very low, a larger value inductor can provide higher efficiency and a lower start-up voltage. in applications where the input voltage is relatively high (v in > 0.8 v), smaller inductors may be used to provide a smaller overall footprint. in all cases, the inductor must have a low dcr and a saturation current rating greater than the highest typical peak current limit setting as listed in the electrical characteristics table. if the dc resistance of the inductor is too high, efficiency will be reduced and the minimum operating voltage will increase. note the inductor value will have a direct effect on the switching frequency. table 5. inductor vendor information vendor part coilcraft www.coilcraft.com epl2014, epl3012, epl3015, lps3015, lps3314, xfl3012 coiltronics www.cooperindustries.com sdh3812, sd3814, sd3114, sd3118 murata www.murata.com lqh3np, lqh32p, lqh44p sumida www.sumida.com cdrh2d16, cdrh2d18, cdrh3d14, cdrh3d16 taiyo-y uden www.t-yuden.com nr3012t, nr3015t, nrs4012t, brc2518 tdk www.tdk.com vls3012, vls3015, vlf302510mt, vlf302512mt t oko www.tokoam.com dp3015c, db3018c, db3020c, dp418c, dp420c, dem2815c, dfe322512c, dfe252012c wrth www.we-online.com we-tpc 2813, we-tpc 3816, we-tpc 2828 maximum power point threshold configuration there are two methods for maintaining the maximum power point of an input source on v in . already discussed in this data sheet is a resistive divider on the run pin monitoring v in . this is useful for >600 mv mpp set points. the LTC3106 also has a dedicated mpp function that can be used over the full input voltage range as well as input voltages between the uvlo and run pin thresholds. note that the LTC3106 i q increases from 1.6a ( typ) to 10.6a (typ) if the mppc pin functionality is enabled. the mpp circuit hysteretically controls v in by setting a lower voltage threshold on the mpp pin. if v in drops below the mpp threshold the converter will stop draw- ing power from v in and force a sleep signal. if v store is within the proper operating range, the output power will then be taken from v store . if however there is not a valid ltc 3106 3106f 27 for more information www.linear.com/LTC3106 a pplica t ions i n f or m a t ion backup source or if the envstr is low the LTC3106 will go to sleep and no power will be available to v out until v in charges the input capacitor voltage above the mpp threshold. if more power is available at v in than is needed to supply v out , v in could rise above the mpp threshold to the open-circuit voltage of source. this is normal as long as the open-circuit voltage is below the maximum allowed input voltage. the mpp pin voltage is set by connecting a resistor between the mpp pin and gnd, as shown in figure 4. the mpp voltage is determined by the equation: v mpp = 1.5a ? r mpp (m) disable the mpp function by tying the mpp pin to v cc . design example 1: photovoltaic or solar energy harvesting with primary battery backup in traditional battery hyp. only wireless nodes the main control unit ( mcu) is connected directly to the battery. several factors contribute to reduced battery capacity in these applications. typically these wireless systems poll the node at a very low frequency with long low power inactive periods and occasional high current bursts when communicating with the node. the peak current during the pulsed load is much greater than the nominal drain cur- rent given by the battery manufacturer reducing capacity beyond that specified at the typical static drain current. further, the usable input voltages for most mcus (2 v min typ) limit the usable capacity. the application circuit in figure 9 shows the LTC3106 interfaced with the am-1816 solar cell supplemented with a cr2032 primary battery configured to deliver power to a pulsed load output. though an energy harvesting system can eliminate the need for batteries, it also serves to supplement and increase battery life. when enough ambient energy is available the battery is unloaded and is only used when the ambient source is inadequate, not only extending battery life but improving reliability. even when battery use is necessary, the pri pin configures the v store input for use of a primary battery, here the cr2032, extending the input voltage range, thereby increasing use of the available capacity than would be possible with a direct battery-mcu connection. the main input voltage, v in , of the LTC3106 is designed to accommodate high impedance solar cells over a wide voltage range. solar cells are classified according to their output power level, material employed ( crystal silicon, amorphous silicon, compound semiconductor) and appli- cation space (indoor or outdoor lighting). sanyo electrics amorton product line ( a subsidiary of panasonic) offers a variety of solar cells for various light conditions ( for typical light conditions see table 6) and power levels as well the ability to customize cells for specific application size and shapes. an additional list of companies that manufacture small solar cells ( also referred to as modules or solar panels) suitable for use with the LTC3106 is provided in table 7. figure 9. solar harvester with primary battery backup + 10h v store v cap envstr v cc pri ilimsel v aux cr2032 lithium coin cell 3v v out mpp os1 os2 ss1 ss2 gnd sw1 sw2 LTC3106 v in run 10m 365k 2m v oc = 4.9v i sc = 82a v in v cc 3106 f09 2.2f 47f 3.3v, ~200w v in threshold = 3.8v min 47f 10f 0.01f 100f 6.3v 3 + sanyo am1816 v dd en gnd tx pgood ltc 3106 3106f 28 for more information www.linear.com/LTC3106 a pplica t ions i n f or m a t ion table 6. typical light conditions location illum. (lux) meeting room 200 corridor 200 office desk 400 to 700 lab 500 to 1000 outdoors (overcast) 1000 to 2000 outdoors (clear) >2000 table 7. small photovoltaic panel manufacturers sanyo http://panasonic.net/energy/amorton/en/ powerfilm http://www.powerfilmsolar.com/ g24 power http://www.gcell.com/ solarprint http://www.solarprint.ie/ alta devices http://www.altadevices.com the i-v and p-v curve for the am-1816 panel is shown in figure 10. the maximum power from the cell (pmax) changes with light level but the voltage at pmax changes only slightly. the v in threshold voltage in this application example is set to equal the voltage at pmax using the resistive divider on the run pin . 4.2 v is chosen for the v in(ov) set point so that it is slightly below. with internal hysteresis the v inuv is then 3.8 v so the average v in voltage of ~4 v is at the maximum power point from the manufacturer i-v and p-v data on the am-1816 solar cell. note the run pin resistive divider will add a v in depen- dent load on the input source. the divider current would be equal to: i indiv(static) 4v 2.21m + 432k ( ) = 1.6a in this application the load is a low power proprietary rf profile (figure 11). the regions of operation are described, output and power losses are tabulated and the peak levels for each are given in table 8. the total average output power needed in this application can be calculated to be 191w. figure 10. measured i-v and p-v curves under variable light conditions table 8. application load profile power budget for figure 11 interval mcu function peak current i n (ma) interval t n (ms) charge i n t n (c) region duty cycle (%) interval output power (mw) average output power (w) LTC3106 power loss (from curves) (mw) LTC3106 average power loss (w) region 1 wake 0.3 1 0.3 0.1 1.0 1 0.2 0.2 region 2 pre-processing 8 0.6 4.8 0.1 26.4 16 3 1.8 region 3 rx/tx 20 1 20 0.1 66.0 66 5 5.0 region 4 processing 8 0.5 4 0.0 26.4 13 3 1.5 region 5 rx/tx 20 1 20 0.1 66.0 66 5 5.0 region 6 sleep/idle 0.001 1000 1 99.5 0.003 3 0.02 19.9 total period: 1004ms total avg power: 165w total avg . power loss: 37w ltc 3106 3106f 0 0.7 1.5 2.2 3.0 3.7 4.4 5.2 5.9 0 1800 lux 0.1 0.3 0.4 0.5 0.6 0.8 0.9 1.0 i panel 1000 lux (ma) p panel (mw) 3106 f10 500 lux 200 lux sanyo 1816 v panel (v) 29 for more information www.linear.com/LTC3106 a pplica t ions i n f or m a t ion figure 11. application load profile for schematic in figure 8 the total average LTC3106 power loss over the same regions of operation for the load profile is 37 w. the di- vider load adds an additional 5 w of input power loss for a total input power requirement of 207 w. the calculated average efficiency, including the resistive divider is then = 165w /207 w which is 80%. the available power from the am-1816 at 200 lux is about 400 w. with a converter efficiency of about 80% the 400 w will power the total 207w average load with some margin. if the light condi - tions become less favorable the available input power may drop below that needed to maintain the output voltage. the LTC3106 configuration in figure 9 will operate with v in in hiccup mode turning on as v in increases above 4.2v and turning off if v in droops below 3.8 v. with v in off, power is then taken from v store until v in recovers and increases above the 4.2v threshold. if the light conditions become more favorable v in will rise to the open-circuit voltage of the harvested source. note if the open-circuit voltage of the harvested source will exceed the maximum voltage rating , an appropriate clamp should be added to prevent damage to the LTC3106. figure?10 shows the open-circuit voltage of the am-1816 can be greater than 5 v. if full light is expected, a low reverse leakage current zener diode is recommended to clamp v in . the dz23, az23 and gdz series with a zener voltage of 4.7v or 5.1v are a good choice. time time 3106 f11 t6 t5 t4t3 t2 t1 i back i pk1 i pk2 region 6 region 5 region 4 region 3 region 2 region 1 current current active active active active tb ta inactive/ sleeping inactive/ sleeping inactive/ sleeping ltc 3106 3106f 30 for more information www.linear.com/LTC3106 a pplica t ions i n f or m a t ion to optimize use of the harvested source and increase the battery life of the backup source it is important to size the input capacitor to handle the average power load for the load profile at the lowest light level. referring again to table 8 to sum the required charge for the load and using the input capacitor sizing equation: c vin = 2/ ? v out ? l n t n ( ) v in(ov) 2 C v in(uv) 2 ( ) f ( ) the average efficiency ( ) with v in = 4.2 v and v out = 3.3v is 0.8. the v in(ov) and v in(uv) thresholds are already determined and i n t n can be found in the load profile table. c vin is found to be 184 f. a single 220 f low leakage tantalum chip capacitor could be used. for the lowest leakage solution and to add design margin 2 100f, 6.3v, 10% ceramic capacitors are selected. if the v in source is unavailable the primary battery on v store will continue to supply the load. to offload the peak current load from the battery and minimize the effect of high peak currents degrading the rated battery capacity the lowest peak current setting on the LTC3106 is chosen. in addition, the v store capacitor design should follow that of the v in capacitor. using the same method but replacing the ov and uv thresholds with the max and min v store input voltages the value of the v store capacitor is calculated to be 38 f. for design margin a low esr 10v , 47 f ceramic capacitor is used. design example 2: thermoelectric harvesting from peltier cell (teg) with rechargeable battery backup a peltier cell ( also known as a thermoelectric cooler) is made up of a large number of series-connected p-n junctions, sandwiched between two parallel ceramic plates. although peltier cells are often used as coolers by applying a dc voltage to their inputs, they will also generate a dc output voltage, using the seebeck effect, when the two plates are at different temperatures. the polarity of the output voltage will depend on the polarity of the temperature differential between the plates. the magnitude of the output voltage is proportional to the magnitude of the temperature dif - ferential between the plates. in this manner, a peltier cell is referred to as a thermoelectric generator (teg). peltier cells are available in a wide range of sizes and power capabilities, from less than 10 mm square to over 50mm square. they are typically 2 mm to 5 mm in height. a list of peltier cell manufacturers is given in table 9. table 9. peltier cell manufacturers micropelt www.micropelt.com cui, inc www.cui.com (distributor) fujitaka www.fujitaka.com/pub/peltier/english/thermoelectric_power.html ferrotec www.ferrotec.com/products/thermal/modules kr yotherm www.kryothermusa.com laird technologies www.lairdtech.com marlow industries www.marlow.com nextreme www.nextreme.com te t echnology www.tetech.com/peltier-thermoelectir c-cooler-modules.html t ellurex www.tellurex.com the low voltage capability of the LTC3106 design allows it to operate from a teg with temperature differentials as low as 20 c, making it ideal for harvesting energy in many industrial applications in which a temperature difference exists between two surfaces or between a surface and the ambient environment. the application circuit in figure 12 shows the LTC3106 interfaced with a teg supplemented with a li- ion recharge - able ( secondary) batter y, both configured to deliver power to a low power pulsed load output. with the run pin con- nected to v store , the application circuit is configured to take advantage of the 300 mv input voltage uvlo. in this configuration v in will operate in hiccup mode turning on as v in increases above 0.3 v and turning off if v in droops 50mv below 0.3 v to maintain an average power to the output without allowing the input to fall to zero. assuming a good batter y voltage the output power will be supplied by the battery when the input voltage drops below the uvlo threshold and transition back to the input when the input charges up above the uvlo threshold. ltc 3106 3106f 31 for more information www.linear.com/LTC3106 a pplica t ions i n f or m a t ion i n addition to providing power to the output when the harvested power is not adequate, the secondary battery also provides a reservoir for excess harvested energy. if the output is in regulation harvested power is diverted to charge the secondary battery. the maximum charge voltage and low battery threshold are programmed by the ss1 and ss2 pins. in figure 12 ss1 and ss2 are configured to provide a worst-case upper threshold of 4.16v and a worst-case low battery threshold of 2.88v (refer to table? 2). charging of the secondary battery will terminate at the upper threshold to prevent exces - sive batter y voltage. since the envstr pin is held high in this application, a prolonged absence of harvested power results in the output being maintained solely by the battery. with v cap and v store connected together, the battery will be disconnected from the internal power path at the low battery threshold to protect li-ion batteries from permanent damage due to deep discharge. a low esr 10f capacitor is used to decouple the v store /v cap pin. figure 12. teg harvester with secondary battery backup similar to the previous design example the load profile is another low power proprietary rf profile ( figure 13). the rxtx rate of this load pulse is 2 seconds. the regions of operation are described, output and power losses are tabulated and the peak levels for each are given in table 10. the total average output power needed in this application can be calculated to be 42w. the total average LTC3106 power loss over the same regions of operation for the load profile is 31 w. the total input power requirement is 73 w. the calculated average efficiency, including the resistive divider is then = 42 w/73w which is 0.58. although this may seem low it is important to realize the load current is quite low (2a) a majority of the time ( sleep/idle region) where the average power loss from the LTC3106 is only 20w. to minimize use of the secondary battery and prolonging its long term lifetime, it is important to optimize the use of the harvested source by dimensioning the input capaci - tor to handle the average power load for the load profile at the lowest temperature differential. referring again to + 10h v store v cap envstr run v cc pri ilimsel v aux panasonic ncr18650b lithium ion cell v out mpp os2 os1 ss2 ss1 gnd sw1 sw2 LTC3106 v in 10m v cc v cc 3106 f12 2.2f zlls400 schottky 47f 3.3v, ~50w 0.3v to 3.5v 47f 10f marlow teg rc12-2.5-01ls with 40mm 40mm 35mm finned heatsink + 0.01f 470f 6.3v 2 + v dd en gnd tx pgood ltc 3106 3106f 32 for more information www.linear.com/LTC3106 a pplica t ions i n f or m a t ion table 11 to sum the required charge for the load and using the input capacitor sizing equation: c vin = 2/ ? v out ? l n t n ( ) v inov 2 C v inuv 2 ( ) table 11. low capacity li-ion and thin film battery manufacturers vendor part cymbet enerchip cbc series infinite power solutions thinergy mec2000 and mec100 series gm battery gmb and lipo series the average efficiency ( ) with v in(ov) = 0.3 v and v in(uv) = 0.25 v, the input uvlo upper and lower thresholds re- spectively, and a v out of 3.3 v is the already calculated = 0.58. the i n t n can be found in the load profile table. c vin is then found to be 973 f. at such low harvested power levels, the input capacitor values can be quite large. large value storage capacitor manufactures are listed in table?4. the application in figure 12 uses 2 470f tantalum chip capacitors. the chosen capacitor should be rated for a voltage greater than the maximum open-circuit voltage of the harvested source and/or clamped to an appropriate voltage. if the open circuit teg voltage is expected to be greater than the maximum rating of the input pin, it is recommended that a low reverse leakage current 4.7 v or 5.1 v zener diode be used to clamp v in . the available power from the teg at the lowest temperature differential (dt = 20 c) is about 200 w, enough to power the total 42w average load with some margin. if the conditions become less favorable the available input power may drop below that is needed at the output, v in will drop below the uvlo threshold turning off v in . with v in off, power is then taken from v store until v in recovers and increases above the uvlo threshold. figure 13. application load profile time 3106 f13 t5 t4 t3 t2 t1 i back i pk1 i pk3 i pk2 region 5 region 4 region 3 region 2 region 1 current ltc 3106 3106f 33 for more information www.linear.com/LTC3106 table 10. application load profile power budget for figure 11 interval mcu function peak current i n (ma) interval t n (ms) charge i n t n (c) region duty cycle (%) interval output power (mw) average output power (w) LTC3106 power loss (from curves) (mw) LTC3106 average power loss (w) region 1 sleep/idle 0.002 2000 4 99.85 0.007 7 0.2 20.0 region 2 pre-processing 1.7 0.6 1.02 0.03 56 2 3 0.9 region 3 tx 17 1 17 0.05 53.1 28 5 7.5 region 4 rx 4 0.5 2 0.02 13.2 3 3 1.2 region 5 post-processing 1.7 1 1.7 0.05 5.6 3 5 1.5 total period: 2003ms total avg power: 42.37w total avg . power loss: 31w a pplica t ions i n f or m a t ion if conditions become more favorable the input capacitor will charge to a higher voltage terminating at the open- circuit voltage of the harvested source. when the output is idle under these conditions, excess energy is used to maintain the charge on the v store battery. any remaining excess energy will be stored on the input capacitor and v in will rise to the open-circuit voltage of the harvested source. as already mentioned, if the open-circuit voltage of the harvested source will exceed the maximum voltage rating of the pin an appropriate clamp should be added to prevent damage to the LTC3106. most mcus, even low power wireless specific mcus, still load the LTC3106 output with a small current. if, however, the load current will be less than 400 na the output regulation error can increase to 5% of the nominal output voltage depending on sleep period and the size of the output capacitor. ltc 3106 3106f 34 for more information www.linear.com/LTC3106 the circuit in figure 14 is a practical example of simple energy harvesting. the LTC3106 is powered from the usb bus power when the usb interface is connected for data transfer to a host. when the usb power is available v store is disabled as an input, output power will come from v in and charging of the battery will occur when v out and v aux are in regulation. the battery may also be charged from ambient light on the sanyo am-1454 solar cell when the device used to collect data remotely, extending battery life and the time required between usb connections. note that the d01 output from the monitor goes high and dials the LTC3106 peak current limit higher when usb power is available. figure 15 shows the LTC3106 as a simple dual input , 2.2 v buck-boost converter. one input is from a 5 v wall adaptor and the other from a 3 v rechargeable lithium coin cell. figure 15 also shows an example of the optional external inrush current limiting circuit to v aux . to take advantage of the very low discharge rate and long shelf life of low capacity thin film batteries the application in figure 16 shows use of the shelf mode functionality. an external switch allows the v store pin to be disconnected from the external bypass capacitor on v cap as well the internal power path and threshold detection circuitry thereby reducing battery discharge to v store pin leakage plus the self-discharge of the battery itself. a factory pre-charged battery could then be assembled into the harvester node and stored with a full charge for some time. when enabled the battery will supplement the harvested source and will be recharged with any surplus harvested energy. a list of thin-film battery manufacturers is listed in table 11. the circuit in figure 17 shows the LTC3106 configured to harvest solar energy when possible to prolong the time before battery service is necessary. the resistive divider on run sets the optimal minimum operating point for the solar cell on v in . when available, harvested power on v in supplements the power available from the primary battery extending the life of the battery. typical a pplica t ions figure 14. portable medical device with ambient light harvester or usb powered charging 10h pri v aux v out ilimsel mpp os2 ss1 os1 ss2 gnd sw1 sw2 LTC3106 v in 5v run 10m 432k d1: diodes inc zlls400 q1: zetex zmx61p03f 2.21m v cc 3106 f15 2.2f 0.1f 47f 2.2v (300ma) (3.7v turn on) 47f 22f 0.01f pgood v cc + v store v cap envstr li rechargeable battery q1 d1 10h v store v cap envstr v cc pri v aux v out mpp os1 ss2 os2 ss1 gnd sw1 sw2 LTC3106 v in run 10m 1.33m 2.21m v oc = 2.4v i sc = 35a v in v cc 3106 f14 2.2f nimh 2 47f gnd sensor(s) usb i/o usb power v dd en do1 3.3v (90ma/300ma) monitor processing 10f 0.1f 4700f 6.3v + sanyo am1454 pgood ilmsel mcu data display usb bus power + 4.7f zlls400 schottky figure 15. 5v to 2.2v converter with rechargeable battery backup and inrush current limiting ltc 3106 3106f 35 for more information www.linear.com/LTC3106 figure 16. remote outdoor solar powered harvester with thin film battery backup figure 17. extended life battery powered mote for wireless mesh network + 10h v store envstr v cap pri ilimsel v aux thinergy mec201-10str v out mpp os2 os1 ss2 ss1 gnd sw1 sw2 LTC3106 v in run 1m 432k 2.21m v in v cc 3106 f16 4.7f zlls400 schottky 47f v dd en 3.3v, (180w) wireless sensor node v in threshold = 3.6v 1f 0.01f 100f 6.3v 2 + powerfilm mpt3.6-75 pgood v cc gnd sensor(s) mcu 47f shelf mode 10h pri ilimsel v aux v out mpp os2 os1 ss2 ss1 gnd sw1 sw2 LTC3106 v in run 1m 402k 2.21m v cc 3106 f17 4.7f 47f 3v v cell 1f 1f 0.1f 100f 6.3v 2 + sanyo am-1815 pgood v cc v supply lna_en gnd antenna + v store v cap envstr lithium thionyl chloride aa cell 3.6v 47f ltc5800 typical a pplica t ions ltc 3106 3106f 36 for more information www.linear.com/LTC3106 p ackage descrip t ion please refer to http://www .linear.com/product/LTC3106#packaging for the most recent package drawings. 3.00 0.10 1.50 ref 4.00 0.10 note: 1. drawing is not a jedec package outline 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 0.10 19 20 1 2 bottom view?exposed pad 2.50 ref 0.75 0.05 r = 0.115 typ pin 1 notch r = 0.20 or 0.25 45 chamfer 0.25 0.05 0.50 bsc 0.200 ref 0.00 ? 0.05 (udc20) qfn 1106 rev ? recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 0.70 0.05 0.25 0.05 2.50 ref 3.10 0.05 4.50 0.05 1.50 ref 2.10 0.05 3.50 0.05 package outline r = 0.05 typ 1.65 0.10 2.65 0.10 1.65 0.05 2.65 0.05 0.50 bsc udc package 20-lead plastic qfn (3mm 4mm) (reference ltc dwg # 05-08-1742 rev ?) ltc 3106 3106f 37 for more information www.linear.com/LTC3106 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. p ackage descrip t ion please refer to http://www .linear.com/product/LTC3106#packaging for the most recent package drawings. fe20(cc) tssop rev ? 0413 0.09 ? 0.20 (.0035 ? .0079) 0 ? 8 0.25 ref recommended solder pad layout 0.50 ? 0.75 (.020 ? .030) 4.30 ? 4.50* (.169 ? .177) 1 3 4 5 6 7 8 9 10 111214 13 6.40 ? 6.60* (.252 ? .260) 2.74 (.108) 2.74 (.108) 20 1918 17 16 15 1.20 (.047) max 0.05 ? 0.15 (.002 ? .006) 0.65 (.0256) bsc 0.195 ? 0.30 (.0077 ? .0118) typ 2 2.74 (.108) 0.45 0.05 0.65 bsc 4.50 0.10 6.60 0.10 1.05 0.10 2.74 (.108) millimeters (inches) *dimensions do not include mold flash. mold flash shall not exceed 0.150mm (.006") per side note: 1. controlling dimension: millimeters 2. dimensions are in 3. drawing not to scale see note 4 4. recommended minimum pcb metal size for exposed pad attachment 6.40 (.252) bsc fe package 20-lead plastic tssop (4.4mm) (reference ltc dwg # 05-08-1950 rev ?) exposed pad variation cc ltc 3106 3106f 38 for more information www.linear.com/LTC3106 ? linear technology corporation 2015 lt 1115 ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/LTC3106 r ela t e d p ar t s typical a pplica t ion part number description comments ltc3103 15v, 300ma synchronous step-down dc/dc converter with ultralow quiescent current v in : 2.5v to 15v, v out(min) = 0.6v, i q = 1.8a, i sd = 1a 3mm 3mm dfn-10, msop-10 ltc3105 400ma step-up dc/dc converter with maximum power point control and 250mv start-up v in : 0.225v to 5v, v out(min) adj. 1.5v to 5v, i q = 24a, i sd < 1a, 3mm 3mm dfn-12, msop-12 ltc3107 ultralow voltage energy harvester and primary battery life extender v in = 0.02v to 1v, v out tracks v bat , v bat = 2v to 4v, i q = 80na, v ldo = 2.2v, 3mm 3mm dfn-10 ltc3108/ltc3108-1 ultralow voltage step-up converter and power managers v in : 0.02v to 1v, v out(min) fixed 2.35v to 5v, i q = 6a, i sd < 1a, 3mm 4mm dfn-12, ssop-16 ltc3109 auto-polarity, ultralow voltage step-up converter and power manager v in : 0.03v to 1v, v out(min) fixed 2.35v to 5v, i q = 7a, i sd < 1a, 4mm 4mm qfn-20, ssop-20 ltc4070 li-ion/polymer shunt battery charger system 450na i q , 1% float voltage accuracy, 50ma shunt current 4.0v/4.1v/4.2v ltc4071 li-ion/polymer shunt battery charger system with low battery disconnect 550na i q , 1% float voltage accuracy, <10na low battery disconnect, 4.0v/4.1v/4.2v, 8-lead 2mm 3mm dfn and msop packages ltc3129/ltc3129-1 micropower 200ma synchronous buck-boost dc/dc converter v in : 2.42v to 15v, v out : 1.4v to 15v, i q = 1.3a, i sd = 10na, msop-16e, 3mm 3mm qfn-16 packages ltc3330/ltc3331 nanopower buck-boost dc/dc with energy harvesting batter y life extender v in : 2.7v to 20v, v out : 1.2v to 5.0v, enable and standby pins, i q = 750na, 5mm 5mm qfn-32 package ltc3388-1/ltc3388-3 20v high efficiency nanopower step-down regulator v in : 2.7v to 20v, v out : 1.2v to 5.0v, enable and standby pins, i q = 720na, i sd = 400na, 3mm 3mm dfn-10, msop-10 ltc3588-1 nanopower energy harvesting power supply 950na i q in sleep, v out : 1.8v, 2.5v, 3.3v, 3.6v, integrated bridge rectifier, mse-10 and 3mm 3mm qfn-10 packages ltc3588-2 nanopower energy harvesting power supply <1a i q in regulation, uvlo rising = 16v, uvlo falling = 14v, v out = 3.45v, 4.1v, 4.5v 5.0, mse-10 and 3mm 3mm qfn-10 packages ltc5800-ipma ip wireless mote-on-chip ultralow power mote, 72-lead, 10mm 10mm qfn 10h v store v cap envstr v cc pri ilimsel v aux v out mpp os2 os1 ss2 ss1 gnd sw1 sw2 LTC3106 run 10m 47f 1.8v 300ma v cc 3106 tao2 2.2f 22f 0.01f pgood v in 0.6v to 5v (0.85v to start) simple wide input voltage buck-boost converter ltc 3106 3106f |
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